1. Field of the Invention
The invention disclosed herein broadly relates to microprocessor clock systems, and more particularly to a cross-monitored pair of clocks for operating a pair of microprocessors with Fail-Safe operation.
2. Description of Related Art
Fail-Safe operation of data processing systems is of paramount importance when such systems are employed for aircraft navigation and flight control. Commonly, aircraft applications require redundant systems as a means for cross-checking the navigation and/or flight control output. In those situations in which a pair of processors operate on the same input data, the intended output data of each of the processors should be identical, thereby verifying the integrity of the output data. If, of course, the output data of the independent processing systems are different, a failure is generally detected and a warning given to the pilot. This is so, since the pilot cannot determine which processor system is providing the "correct" output data.
Commonly, navigation and/or flight control systems generally employ a microprocessor for executing a fixed set of instructions requiring a fixed number of input clock cycles to execute these instructions. The total number of clock cycles to execute the fixed set of instructions is sometimes referred to as a frame. In order to provide independent redundancy, generally associated with each microprocessor is an independent system clock signal provided by a clock generator, commonly employing a high frequency oscillator.
When employing a pair of microprocessors, each having associated therewith an independent oscillator and a frame interrupt signal for reading output data, it is of paramount importance that the oscillator and the interrupt frame frequency be substantially identical and be provided by precision oscillators and/or clock generators. Even so, component degradation and/or environmentally induced variation in the frequency outputs thereof must be monitored in order to detect whether or not the microprocessors are operating in unison so that the output data can be relied upon. Thus, there is a need for a cross-monitored clock-pair system for Fail-Safe monitoring the clocking operation of the microprocessors, while at the same time maintaining independence.